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MC74VHCU04 Hex Inverter
(Unbuffered)
The MC74VHCU04 is an advanced high speed CMOS unbuffered inverter fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems.
Features
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14 SOIC-14 D SUFFIX CASE 751A 1 14 TSSOP-14 DT SUFFIX CASE 948G 1 14 SOEIAJ-14 M SUFFIX CASE 965 1 VHCU04 ALYWG VHCU 04 ALYWG G VHCU04G AWLYWW
* * * * * * * * * * * *
High Speed: tPD = 3.5 ns (Typ) at VCC = 5.0 V Low Power Dissipation: ICC = 2 mA (Max) at TA = 25C High Noise Immunity: VNIH = VNIL = 10% VCC (Min.) Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2.0 V to 5.5 V Operating Range Low Noise: VOLP = 0.8 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V Chip Complexity: 12 FETs or 3 Equivalent Gates Pb-Free Packages are Available*
1 2
1
1
1
A1
Y1
A2
3
4
Y2
A3
5
6
A = Assembly Location WL, L = Wafer Lot Y, YY = Year WW, W = Work Week G or G = Pb-Free Package (Note: Microdot may be in either location) Y=A
Y3
A4
9
8
FUNCTION TABLE
Inputs A Outputs Y H L
Y4
A5
11
10
Y5
L H
A6
13
12
Y6
Figure 1. Logic Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2006
March, 2006 - Rev. 4
1
Publication Order Number: MC74VHCU04/D
MC74VHCU04
VCC 14
A6 13
Y6 12
A5 11
Y5 10
A4 9
Y4 8
1 A1
2 Y1
3 A2
4 Y2
5 A3
6 Y3
7 GND
(Top View)
Figure 2. Pinout: 14-Lead Packages
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MAXIMUM RATINGS
Symbol VCC Vin IIK Vout IOK Iout PD Parameter Value Unit V V V DC Supply Voltage DC Input Voltage -0.5 to + 7.0 -0.5 to + 7.0 DC Output Voltage -0.5 to VCC + 0.5 -20 20 25 50 500 450 Input Diode Current mA mA mA mA Output Diode Current DC Output Current, per Pin ICC DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Storage Temperature SOIC Packages TSSOP Package mW Tstg - 65 to + 150III _C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Derating -- SOIC Packages: - 7 mW/_C from 65_ to 125_C TSSOP Package: - 6.1 mW/_C from 65_ to 125_C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC ). Unused outputs must be left open.
RECOMMENDED OPERATING CONDITIONS
IIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIII III I III I I I I IIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIII III I
Symbol VCC Vin TA Vout Parameter Min 2.0 0 0 Max 5.5 5.5 Unit V V V DC Supply Voltage DC Input Voltage DC Output Voltage VCC Operating Temperature -40 + 85 _C
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1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 6 (per buffer). CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I I II I I I I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I II II I II I II I IIIIIIIIIIIIIIIIIIIIII II II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIII I II II I I IIIIIIIIIII I I I I IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I IIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I I I I I I I I I I I I I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I II I I I I I I I I I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I IIIIIIIIIIIIIIII IIIIIIIIIIIIIII I I I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I I IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I II II I I I I I I I I I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I I IIIIIIIIIIIIIIIIIIIIIII I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I I I II I I I II I I I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIII I I I II I I I II I I II I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I IIIIIII IIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns) DC ELECTRICAL CHARACTERISTICS
Symbol Symbol tPLH, tPHL VOH VOL VIH ICC Cin VIL Iin Power Dissipation Capacitance (Per Inverter) (Note 1) Maximum Input Capacitance Maximum Propagation Delay, A or B to Y Maximum Quiescent Supply Current Maximum Input Leakage Current Maximum Low-Level Output Voltage Minimum High-Level Output Voltage Maximum Low-Level Input Voltage Minimum High-Level Input Voltage Parameter Parameter Vin = VCC or GND Vin = 5.5 or GNDIIII 0 to 5.5 Vin = VCC IOL = 4mA IOL = 8mA Vin = VIH IOL = 50mA Vin = GND IOH = -4mA IOH = -8mA Vin =VIL IOH = -50mA Test Conditions VCC = 5.0 0.5V VCC = 3.3 0.3V Test Conditions
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V)
Symbol
VOLP
VOLV
VIHD
VILD
CPD
Maximum Low Level Dynamic Input Voltage
Minimum High Level Dynamic Input Voltage
Quiet Output Minimum Dynamic VOL
Quiet Output Maximum Dynamic VOL
Characteristic
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MC74VHCU04
2.0 3.0 to 5.5
2.0 3.0 to 5.5
VCC V
5.5
3.0 4.5
2.0 3.0 4.5
3.0 4.5
2.0 3.0 4.5
CL = 15pF CL = 50pF
CL = 15pF CL = 50pF
3 1.70 VCC x 0.8 2.58 3.94 Min 1.8 2.7 4.0 Min TA = 25C TypIIII Min Max 0.0 0.0 0.0 2.0 3.0 4.5 TA = 25C Typical @ 25C, VCC = 5.0V Typ 3.5 5.0 5.0 7.5 5 0.30 VCC x 0.2 0.1 0.36 0.36 2.0 0.2 0.3 0.5 Max 8.9 11.4 5.5 7.0 10 9 -0.5 Typ 0.5 1.70 VCC x 0.8 TA = -40 to 85C TA = 25C 2.48 3.80 1.8 2.7 4.0 TA = -40 to 85C Min 1.0 1.0 1.0 1.0 0.30 VCC x 0.2 -0.8 Max 1.0 4.0 0.8 1.0 20.0 0.44 0.44 Max 0.2 0.3 0.5 10.5 13.0 Max 6.5 8.0 10 Unit Unit Unit mA mA pF pF ns V V V V V V V V
MC74VHCU04
TEST POINT A VCC 50% GND tPLH Y 50% VCC *Includes all probe and jig capacitance tPHL DEVICE UNDER TEST OUTPUT CL*
Figure 3. Switching Waveforms
Figure 4. Test Circuit
Parasitic Diode INPUT OUTPUT Parasitic Diode
Figure 5. Input Equivalent Circuit
ORDERING INFORMATION
Device MC74VHCU04DR2 MC74VHCU04DR2G MC74VHCU04DTR2 MC74VHCU04DTR2G MC74VHCU04MEL MC74VHCU04MELG Package SOIC-14 SOIC-14 (Pb-Free) TSSOP-14* TSSOP-14* SOEIAJ-14 SOEIAJ-14 (Pb-Free) Shipping 2500 Tape & Reel 2500 Tape & Reel 2500 Tape & Reel 2500 Tape & Reel 2000 Tape & Reel 2000 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free.
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MC74VHCU04
PACKAGE DIMENSIONS
SOIC-14 D SUFFIX CASE 751A-03 ISSUE G
-A-
14 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019
-B-
P 7 PL 0.25 (0.010)
M
B
M
1
7
G
C
R X 45 _
F
-T-
SEATING PLANE
D 14 PL 0.25 (0.010)
K
M
M
S
J
TB
A
S
TSSOP-14 DT SUFFIX CASE 948G-01 ISSUE A
14X K REF NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS INCHES MIN MAX MIN MAX 4.90 5.10 0.193 0.200 4.30 4.50 0.169 0.177 --- 1.20 --- 0.047 0.05 0.15 0.002 0.006 0.50 0.75 0.020 0.030 0.65 BSC 0.026 BSC 0.50 0.60 0.020 0.024 0.09 0.20 0.004 0.008 0.09 0.16 0.004 0.006 0.19 0.30 0.007 0.012 0.19 0.25 0.007 0.010 6.40 BSC 0.252 BSC 0_ 8_ 0_ 8_
0.10 (0.004) 0.15 (0.006) T U
S
M
TU
S
V N
S
2X
L/2
14
8
0.25 (0.010) M
L
PIN 1 IDENT. 1 7
B -U-
N F DETAIL E K
0.15 (0.006) T U
S
J J1
C 0.10 (0.004) -T- SEATING
PLANE
D
G
H
DETAIL E
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5
EEE CCC EEE CCC EEE CCC
A -V-
K1
SECTION N-N -W-
DIM A B C D F G H J J1 K K1 L M
MC74VHCU04
PACKAGE DIMENSIONS
SOEIAJ-14 M SUFFIX CASE 965-01 ISSUE A
14
8
LE Q1 E HE M_ L DETAIL P
1
7
Z D e A VIEW P
c
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE 0.50 LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.10 0.20 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 1.42 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.004 0.008 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.056
b 0.13 (0.005)
M
A1 0.10 (0.004)
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MC74VHCU04/D

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